How Would Increasing The Number Of Registers Decrease An Assembly Program

Assembly - Registers

Processor operations mostly involve processing data. This data can be stored in memory and accessed from thereon. However, reading information from and storing data into retention slows down the processor, as it involves complicated processes of sending the information request beyond the control autobus and into the memory storage unit and getting the data through the aforementioned channel.

To speed up the processor operations, the processor includes some internal memory storage locations, called registers.

The registers shop information elements for processing without having to access the memory. A express number of registers are congenital into the processor chip.

Processor Registers

At that place are ten 32-flake and vi xvi-chip processor registers in IA-32 compages. The registers are grouped into 3 categories −

Full general registers,
Command registers, and
Segment registers.

The general registers are further divided into the following groups −

Data registers,
Pointer registers, and
Index registers.

Data Registers

Iv 32-scrap information registers are used for arithmetic, logical, and other operations. These 32-fleck registers tin can exist used in three ways −

As complete 32-scrap data registers: EAX, EBX, ECX, EDX.
Lower halves of the 32-scrap registers tin can be used as iv 16-scrap data registers: AX, BX, CX and DX.
Lower and higher halves of the higher up-mentioned four xvi-bit registers can be used every bit 8 viii-chip data registers: AH, AL, BH, BL, CH, CL, DH, and DL.

Data Registers

Some of these data registers take specific utilise in arithmetical operations.

AX is the primary accumulator; it is used in input/output and most arithmetic instructions. For example, in multiplication performance, one operand is stored in EAX or AX or AL register according to the size of the operand.

BX is known as the base register, as it could be used in indexed addressing.

CX is known as the count annals, as the ECX, CX registers shop the loop count in iterative operations.

DX is known as the information register. Information technology is likewise used in input/output operations. It is as well used with AX annals along with DX for multiply and divide operations involving large values.

Arrow Registers

The pointer registers are 32-bit EIP, ESP, and EBP registers and corresponding 16-scrap correct portions IP, SP, and BP. At that place are three categories of pointer registers −

Didactics Pointer (IP) − The 16-scrap IP register stores the showtime accost of the next instruction to be executed. IP in association with the CS annals (as CS:IP) gives the complete address of the current instruction in the code segment.
Stack Arrow (SP) − The 16-bit SP annals provides the beginning value within the programme stack. SP in clan with the SS annals (SS:SP) refers to be current position of data or accost within the program stack.
Base of operations Arrow (BP) − The xvi-scrap BP register mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the offset in BP to get the location of the parameter. BP can as well be combined with DI and SI as base annals for special addressing.

Pointer Registers

Index Registers

The 32-flake alphabetize registers, ESI and EDI, and their sixteen-bit rightmost portions. SI and DI, are used for indexed addressing and sometimes used in improver and subtraction. There are two sets of index pointers −

Source Index (SI) − It is used equally source index for string operations.
Destination Index (DI) − It is used as destination alphabetize for string operations.

Index Registers

Control Registers

The 32-flake pedagogy pointer annals and the 32-bit flags annals combined are considered as the control registers.

Many instructions involve comparisons and mathematical calculations and change the status of the flags and some other conditional instructions test the value of these condition flags to take the command flow to other location.

The common flag bits are:

Overflow Flag (OF) − It indicates the overflow of a high-gild fleck (leftmost bit) of data afterward a signed arithmetic operation.
Management Flag (DF) − Information technology determines left or right direction for moving or comparing string data. When the DF value is 0, the string functioning takes left-to-right direction and when the value is fix to 1, the string operation takes right-to-left management.
Interrupt Flag (IF) − It determines whether the external interrupts like keyboard entry, etc., are to be ignored or candy. It disables the external interrupt when the value is 0 and enables interrupts when set to 1.
Trap Flag (TF) − It allows setting the operation of the processor in single-step way. The DEBUG program we used sets the trap flag, so we could pace through the execution one instruction at a time.
Sign Flag (SF) − It shows the sign of the result of an arithmetics performance. This flag is set up according to the sign of a data item post-obit the arithmetic performance. The sign is indicated past the high-order of leftmost bit. A positive result clears the value of SF to 0 and negative issue sets information technology to 1.
Naught Flag (ZF) − It indicates the result of an arithmetics or comparison performance. A nonzero effect clears the zero flag to 0, and a zero upshot sets it to 1.
Auxiliary Deport Flag (AF) − It contains the carry from fleck 3 to fleck four following an arithmetic operation; used for specialized arithmetic. The AF is prepare when a 1-byte arithmetic operation causes a carry from bit three into bit 4.
Parity Flag (PF) − It indicates the full number of ane-bits in the outcome obtained from an arithmetic performance. An even number of 1-bits clears the parity flag to 0 and an odd number of one-$.25 sets the parity flag to 1.
Comport Flag (CF) − It contains the carry of 0 or 1 from a high-order bit (leftmost) after an arithmetic functioning. It also stores the contents of final bit of a shift or rotate operation.

The post-obit tabular array indicates the position of flag bits in the sixteen-bit Flags register:

Flag:					O	D	I	T	Due south	Z		A		P		C
Fleck no:	15	fourteen	13	12	eleven	10	nine	viii	7	6	5	four	three	2	1	0

Segment Registers

Segments are specific areas defined in a plan for containing information, code and stack. In that location are three main segments −

Code Segment − It contains all the instructions to exist executed. A 16-bit Code Segment register or CS annals stores the starting address of the lawmaking segment.
Information Segment − It contains data, constants and work areas. A sixteen-flake Data Segment register or DS annals stores the starting address of the data segment.
Stack Segment − It contains data and render addresses of procedures or subroutines. Information technology is implemented as a 'stack' data structure. The Stack Segment register or SS annals stores the starting accost of the stack.

Apart from the DS, CS and SS registers, in that location are other actress segment registers - ES (extra segment), FS and GS, which provide additional segments for storing information.

In associates programming, a program needs to admission the memory locations. All retentivity locations within a segment are relative to the starting accost of the segment. A segment begins in an accost evenly divisible past 16 or hexadecimal x. So, the rightmost hex digit in all such retentivity addresses is 0, which is not more often than not stored in the segment registers.

The segment registers stores the starting addresses of a segment. To become the verbal location of data or instruction within a segment, an beginning value (or displacement) is required. To reference any retentiveness location in a segment, the processor combines the segment accost in the segment register with the commencement value of the location.

Instance

Look at the following simple program to sympathize the employ of registers in assembly programming. This program displays 9 stars on the screen along with a elementary message −

section	.text    global _start	 ;must be declared for linker (gcc) 	 _start:	         ;tell linker entry signal    mov	edx,len  ;message length    mov	ecx,msg  ;message to write    mov	ebx,i    ;file descriptor (stdout)    mov	eax,iv    ;system call number (sys_write)    int	0x80     ;call kernel 	    mov	edx,9    ;message length    mov	ecx,s2   ;message to write    mov	ebx,i    ;file descriptor (stdout)    mov	eax,4    ;organisation phone call number (sys_write)    int	0x80     ;call kernel 	    mov	eax,1    ;system call number (sys_exit)    int	0x80     ;phone call kernel 	 section	.data msg db 'Displaying 9 stars',0xa ;a message len equ $ - msg  ;length of message s2 times 9 db '*'

When the above code is compiled and executed, it produces the following result −

Displaying nine stars *********